board_muse231.h

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00001 /* Copyright (c) 2011
00002     Daniel Thiele,
00003     Axel Wachtler
00004    All rights reserved.
00005 
00006    Redistribution and use in source and binary forms, with or without
00007    modification, are permitted provided that the following conditions
00008    are met:
00009 
00010    * Redistributions of source code must retain the above copyright
00011      notice, this list of conditions and the following disclaimer.
00012    * Redistributions in binary form must reproduce the above copyright
00013      notice, this list of conditions and the following disclaimer in the
00014      documentation and/or other materials provided with the distribution.
00015    * Neither the name of the authors nor the names of its contributors
00016      may be used to endorse or promote products derived from this software
00017      without specific prior written permission.
00018 
00019    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00020    AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00021    IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00022    ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
00023    LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
00024    CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
00025    SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00026    INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
00027    CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
00028    ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00029    POSSIBILITY OF SUCH DAMAGE. */
00030 
00031 /* $Id: board_muse231.h,v 1.8 2011/01/27 14:22:24 dath Exp $ */
00090 # define BOARD_TYPE (BOARD_MUSE231)    
00091 # define BOARD_NAME "Multisensor 231"     
00092 # define RADIO_TYPE (RADIO_AT86RF231)  
00094 #ifndef BOARD_MUSE231_H
00095 #define BOARD_MUSE231_H  (1)
00096 /*=== Compile time parameters ========================================*/
00097 
00098 #ifndef DEFAULT_SPI_RATE
00099 # define DEFAULT_SPI_RATE  (SPI_RATE_1_2)
00100 #endif
00101 
00102 /*=== Hardware Components ============================================*/
00103 
00104 /*=== TRX pin access macros ==========================================*/
00105 
00106 #define DDR_TRX_RESET   DDRC          
00107 #define PORT_TRX_RESET  PORTC         
00108 #define MASK_TRX_RESET  (_BV(1))      
00109 /* check in board.h if standard definitions of TRX_RESET_INIT,
00110    TRX_RESET_HIGH, TRX_RESET_LOW are Ok, otherwise define here */
00111 
00112 #define PORT_TRX_SLPTR  PORTC         
00113 #define DDR_TRX_SLPTR   DDRC          
00114 #define MASK_TRX_SLPTR  (_BV(0))    
00115 /* check in board.h if standard definitions of TRX_SLPTR_INIT,
00116    TRX_SLPTR_HIGH, TRX_SLPTR_LOW are Ok, otherwise define here */
00117 
00118 
00119 /*=== ACC pin access macros ==========================================*/
00120 
00121 #define ACC_IRQ_DDR      DDRD
00122 #define ACC_IRQ_PORT     PORTD
00123 #define ACC_IRQ_PIN      PIND
00124 #define ACC_IRQ_bp       (2)
00125 #define ACC_IRQ_ASIN()   do{ ACC_IRQ_DDR &= ~_BV(ACC_IRQ_bp);  }while(0)
00126 #define ACC_IRQ_ASOUT()  do{ ACC_IRQ_DDR |= _BV(ACC_IRQ_bp);   }while(0)
00127 #define ACC_IRQ_LO()     do{ ACC_IRQ_PORT &= ~_BV(ACC_IRQ_bp); }while(0)
00128 #define ACC_IRQ_HI()     do{ ACC_IRQ_PORT |= _BV(ACC_IRQ_bp);  }while(0)
00129 #define ACC_IRQ_STATE() ( (ACC_IRQ_PIN & _BV(ACC_IRQ_bp)) != 0)
00130 
00131 /*=== IRQ access macros ==============================================*/
00132 
00133 #define TRX_IRQ_PORT (PORTD)
00134 #define TRX_IRQ_DDR (DDRD)
00135 #define TRX_IRQ_PIN (PIND)
00136 #define TRX_IRQ_bp  (5)
00137 
00138 # define TRX_IRQ         0x00   
00139 # define TRX_IRQ_vect    PCINT2_vect    
00140 # define ACC_IRQ_vect    INT0_vect    
00145 # define TRX_IRQ_INIT()  do{ PCICR |= _BV(PCIE2); } while(0) 
00146 
00147 #define DI_TRX_IRQ() { PCMSK2 &= ~_BV(PCINT21); }
00148 
00149 #define EI_TRX_IRQ() { PCMSK2 |= _BV(PCINT21); }
00150 
00152 #define ACC_IRQ_INIT() do{ EICRA |= _BV(ISC00) | _BV(ISC01); }while(0)
00153 
00154 #define EI_ACC_IRQ()   do{ EIFR |= _BV(INTF0); \
00155                            EIMSK |= _BV(INT0);}while(0)
00156 
00157 #define DI_ACC_IRQ()   do{ EIMSK &= ~_BV(INT0); }while(0)
00158 
00159 /*=== SPI access macros ==============================================*/
00160 #define SPI_TYPE  SPI_TYPE_SPI
00161 #define DDR_SPI  (DDRB)   
00162 #define PORT_SPI (PORTB)  
00164 #define SPI_MOSI _BV(PB3)  
00165 #define SPI_MISO _BV(PB4)  
00166 #define SPI_SCK  _BV(PB5)  
00167 #define SPI_SS   _BV(PB0)  
00170 #define SPI_DATA_REG SPDR    
00176 static inline void SPI_INIT(uint8_t spirate)
00177 {
00178     /* first configure SPI Port, then SPCR */
00179     
00180     /* pullup for SS of SPI unit to prevent setting to SLAVE, not TRX_SELN! */
00181     PORT_SPI |= _BV(PB2);
00182 
00183     PORT_SPI |= SPI_SS | SPI_MISO | SPI_MOSI | SPI_SCK;
00184     DDR_SPI  |= SPI_MOSI | SPI_SCK | SPI_SS;
00185     DDR_SPI  &= ~SPI_MISO;
00186 
00187     SPCR = (_BV(SPE) | _BV(MSTR));
00188     
00189     SPCR &= ~(_BV(SPR1) | _BV(SPR0) );
00190     SPSR &= ~_BV(SPI2X);
00191 
00192     SPCR |= (spirate & 0x03);
00193     SPSR |= ((spirate >> 2) & 0x01);
00194 }
00195 
00197 #define SPI_SELN_LOW()       uint8_t sreg = SREG; cli(); PORT_SPI &=~SPI_SS
00198 
00199 #define SPI_SELN_HIGH()      PORT_SPI |= SPI_SS; SREG = sreg
00200 
00201 #define SPI_WAITFOR()        do { while((SPSR & _BV(SPIF)) == 0);} while(0)
00202 
00203 /*=== LED access macros ==============================================*/
00204 
00205 #define LED_PORT      PORTD      
00206 #define LED_DDR       DDRD       
00207 #define LED_MASK      (0x18)     
00208 #define LED_SHIFT     (3)        
00209 #define LEDS_INVERSE  (1)        
00211 #define LED_NUMBER    (1)        
00213 /* special handling for this board */
00214 #define LED_PIN       PIND       
00215 #define LED_ANODE_bp   (3)      
00216 #define LED_CATHODE_bp (4)      
00218 /*=== KEY access macros ==============================================*/
00219 #define NO_KEYS       (1)        
00221 /*=== Host Interface ================================================*/
00222 
00223 #define HIF_TYPE    HIF_NONE
00224 
00225 /*=== TIMER Interface ===============================================*/
00226 #define HWTMR_PRESCALE  (1)
00227 #define HWTIMER_TICK    ((1.0*HWTMR_PRESCALE)/F_CPU)
00228 #define HWTIMER_TICK_NB (0xFFFFUL)
00229 #define HWTIMER_REG     (TCNT1)
00230 #define TIMER_TICK      (HWTIMER_TICK_NB * HWTIMER_TICK)
00231 #define TIMER_POOL_SIZE (4)
00232 #define TIMER_INIT() \
00233     do{ \
00234         TCCR1B |= (_BV(CS10)); \
00235         TIMSK1 |= _BV(TOIE1); \
00236     }while(0)
00237 # define TIMER_IRQ_vect   TIMER1_OVF_vect
00238 
00239 /*=== Special Hardware Ressources ===================================*/
00240 
00241 #define BOARD_HAS_ACC_MMA7455_I2C (1) 
00243 #define BOARD_ACC_MMA7455_I2CADDR (0x3A)  /* IADDR0=0, already left-shifted by 1 */
00244 #define BOARD_SHT21_I2CADDR (0x80)        /* fixed, already left-shifted by 1 */
00245 
00246 #endif /* BOARD_MUSE231_H */

This documentation for µracoli was generated on Wed Feb 2 2011 by  doxygen 1.7.1